XTAL_24M_OK=int_rng_osc, EN_LP_OVERLOAD_SNS=disabled, OVERCUR_TRIG_ADJ=select_zero, XTALOK_DISABLE=enabled, CURRENT_ALERT_RESET=not_reset, PWD_CMP_BATT_DET=enabled, PWD_OVERCUR_DET=enabled, CUR_SNS_THRSH=select_zero, PWD_OSC_INT=powered_up, STS_DC_OK=not_settled, LP_OVERLOAD_THRSH=thrsh_32, SEL_CLK=int_rng_osc, PWD_ZCD=powered_up, LP_HIGH_HYS=lp_12p5mV, DISABLE_AUTO_CLK_SWITCH=xtal_clk, PWD_CMP_OFFSET=powered_up, LP_OVERLOAD_FREQ_SEL=eight_32k_cycle, PWD_CUR_SNS_CMP=powered_up, PWD_HIGH_VOLT_DET=enabled
DCDC Register 0
| PWD_ZCD | Power Down Zero Cross Detection 0 (powered_up): Zero cross detetion function powered up 1 (powered_down): Zero cross detetion function powered down |
| DISABLE_AUTO_CLK_SWITCH | Disable Auto Clock Switch 0 (xtal_clk): If DISABLE_AUTO_CLK_SWITCH is set to 0 and 24M xtal is OK, the clock source will switch from internal ring OSC to 24M xtal automatically 1 (sel_clk): If DISABLE_AUTO_CLK_SWITCH is set to 1, SEL_CLK will determine which clock source the DCDC uses |
| SEL_CLK | Select Clock 0 (int_rng_osc): DCDC uses internal ring oscillator 1 (xtal_24M): DCDC uses 24M xtal |
| PWD_OSC_INT | Power down internal osc 0 (powered_up): Internal oscillator powered up 1 (powered_down): Internal oscillator powered down |
| PWD_CUR_SNS_CMP | Power down signal of the current detector. 0 (powered_up): Current Detector powered up 1 (powered_down): Current Detector powered down |
| CUR_SNS_THRSH | Current Sense (detector) Threshold 0 (select_zero): 150 mA 1 (select_one): 250 mA 2 (select_two): 350 mA 3 (select_three): 450 mA 4 (select_four): 550 mA 5 (select_five): 650 mA |
| PWD_OVERCUR_DET | Power down overcurrent detection comparator 0 (enabled): Overcurrent detection comparator is enabled 1 (disabled): Overcurrent detection comparator is disabled |
| OVERCUR_TRIG_ADJ | Overcurrent Trigger Adjust 0 (select_zero): In Run Mode, 1 A. In Power Save Mode, 0.25 A 1 (select_one): In Run Mode, 2 A. In Power Save Mode, 0.25 A 2 (select_two): In Run Mode, 1 A. In Power Save Mode, 0.2 A 3 (select_three): In Run Mode, 2 A. In Power Save Mode, 0.2 A |
| PWD_CMP_BATT_DET | Power Down Battery Detection Comparator 0 (enabled): Low voltage detection comparator is enabled 1 (disabled): Low voltage detection comparator is disabled |
| EN_LP_OVERLOAD_SNS | Low Power Overload Sense Enable 0 (disabled): Overload Detection in power save mode disabled 1 (enabled): Overload Detection in power save mode enabled |
| PWD_HIGH_VOLT_DET | Power Down High Voltage Detection 0 (enabled): Overvoltage detection comparator is enabled 1 (disabled): Overvoltage detection comparator is disabled |
| LP_OVERLOAD_THRSH | Low Power Overload Threshold 0 (thrsh_32): 32 1 (thrsh_64): 64 2 (thrsh_16): 16 3 (thrsh_8): 8 |
| LP_OVERLOAD_FREQ_SEL | Low Power Overload Frequency Select 0 (eight_32k_cycle): eight 32k cycle 1 (sixteen_32k_cycle): sixteen 32k cycle |
| LP_HIGH_HYS | Low Power High Hysteric Value 0 (lp_12p5mV): Adjust hysteretic value in low power to 12.5mV 1 (lp_25mV): Adjust hysteretic value in low power to 25mV |
| PWD_CMP_OFFSET | Power down output range comparator 0 (powered_up): Output range comparator powered up 1 (powered_down): Output range comparator powered down |
| XTALOK_DISABLE | Disable xtalok detection circuit 0 (enabled): Enable xtalok detection circuit 1 (disabled): Disable xtalok detection circuit and always outputs OK signal “1” |
| CURRENT_ALERT_RESET | Reset Current Alert Signal 0 (not_reset): Current Alert Signal not reset 1 (reset): Current Alert Signal reset |
| XTAL_24M_OK | 24M XTAL OK 0 (int_rng_osc): DCDC uses internal ring OSC 1 (xtal_24M): DCDC uses xtal 24M |
| STS_DC_OK | DCDC Output OK 0 (not_settled): DCDC is settling 1 (settled): DCDC already settled |